The present invention relates to a preamplifier used as the input stage of an operational amplifier commonly resident in the front-end of a Sample-and-Hold circuit, and more particularly to a load circuit for the preamplifier.
Operational amplifiers (OP-AMPs) are among the most basic and ubiquitous building blocks used in hybrid and integrated semiconductor circuits. The OPAMP is fed an input signal in the form of a differential or single-ended voltage waveform, and ideally amplifies it at its output in linear fashion, according to the gain law:Vout(t)=G·Vin(t)where the gain G is independent of the input signal. The gain G is usually maximized in view of the use of the OPAMP in feedback configurations, where negative feedback loop topologies allow for synthesizing a precise amount of forward gain when the loop gain is maximized. Defined as G the combined gain of one or a cascade of amplifying stages (usually comprising OPAMPs) and as β the feedback factor of a precision network connecting the systems' output back to the input, for values of the loop gain G·β>>1 the output is approximately equal to the input amplified by 1/β, as is shown in FIG. 1. FIG. 1 is a simplified schematic of a circuit 100 (feedback loop) operating on the input voltage VIN and generating an output voltage Vout that includes summer 102, a forward gain block 104 usually including an operational amplifier, and a feedback block 106.
It is therefore desirable to augment the value of the combined gain G in the forward path, i.e., to build OPAMPs with high gain for inclusion into feedback loops. On the other hand, the transfer function of OPAMPs is always characterized by a non-ideal frequency response: i.e., a pole/zero constellation in the s-domain of the Laplace transform that determines a Vout(t) response≠G·Vin(t), with multi-pole low-pass filtering effects in general taking place. Other non-idealities such as offset (e.g., dictated by imbalances in the OPAMP's symmetry in differential implementations) and noise (which can descend from basic thermal contributions; barrier effects in the case of shot noise; and low-pass shaped terms such as popcorn noise and 1/f, or flicker, noise) also impact the practical implementation of OPAMPs. The characteristics of the OPAMP generally are governed by trade-offs, whereby an OPAMP structure can be optimized for speed at the expense of higher noise, due to the wide bandwidth; or for gain at the price of speed, when a straightforward cascade of stages is effected and the poles combine to limit the useable bandwidth.
The present invention solves the problem of optimizing a trade-off particularly critical in the front-ends of high-speed, high-resolution mixed signal circuits such as the sample/hold or the track/hold found at the inputs of data acquisition chains, such as in Analog-to-Digital Converters (ADCs). A popular scheme of Sample-and-Hold Amplifier (SHA) is the switched-capacitor “flip-around” structure. In this topology, the input signal is differentially sampled over an input capacitor pair, and then—in a non-overlapping complementary clock phase—fed on to the successive stages of conversion by using an OPAMP. The amplifier device provides the driving capability required to force the output, as governed by the voltage held on the capacitors in the pair, which are now reconfigured as feedback elements by means of a switch network.
FIG. 2(a) shows the switched-capacitor Sample-and-Hold structure 200A in the sampling phase. The basic circuit includes an operational amplifier 202, a first capacitor C1 coupled to the positive input of the amplifier, and a second capacitor C2 coupled to the negative input of the amplifier. In the sampling phase, switches S1, S2, S3 and S4 are closed. The transition to holding phase is executed by opening the switches S3, S4 first, followed by opening switches S1, S2 immediately thereafter.
FIG. 2(b) shows the same switched-capacitor structure 200B in the holding phase, wherein all the switches S1 through S4 have been opened and additional feedback switches S5 and S6 are closed in a complementary, non-overlapping clock phase.
The precision limits of the circuit topology shown in FIGS. 2(a) and 2(b) hinge upon the gain attainable inside the differential OPAMP. The operational amplifier also determines the properties of transient settling of the SHA, which ultimately dictates the sampling rate that the discrete-time system can sustain. Such settling behavior depends on the stability of the closed-loop circuit configuration, precisely determined by the phase margin φM of the open-loop gain, and often—in ultimate analysis—of the OPAMP itself. Then, the noise introduced by the OPAMP usually exceeds the kT/C sampling noise stored on the capacitors, and the SHA performance in terms of resolution—limited by noise and settled signal accuracy—is ultimately limited by the combined noise and speed characteristics of the OPAMP.
A popular OPAMP topology used to implement amplifiers for SHA front-ends makes use of a preamplifier in front of a telescopic gain stage, as shown, e.g., in Zanchi (U.S. Pat. No. 6,664,912). The wide-band design of the preamplifier allows in fact for the avoidance of pole-splitting dynamics such as the ones observed (and exploited) in the design of two-stage amplifiers, since the G(s) (gain profile vs. frequency, a Laplace transform) of the telescopic cascode of devices of the gain stage is gained up, and simultaneously broad-banded, by the gain of the preamplifier—whose own singularities lie at higher frequencies. However, the additional preamplifier stage injects its own noise in the loop, and only a certain threshold level of preamplifier gain allows for compensating this additional noise, since the input-referred noise contribution of the following stage is abated by a factor equal to the preamplifier gain. Moreover, being a differential circuit, the preamplifier still requires some form of common-mode level control to set the voltage level of its outputs.
Prior art solutions to the OPAMP's noise and stability problems rely on purely resistive differential loads on the preamplifier differential input pair, in order to broad-band the stage itself due to the lower impedance of the preamplifier driving the second stage, as declared by Zanchi and Tsay (IEEE JSSCa, 2005) and yet previously by Michalski (IEEE VLSI Symposium, 2000). It is important to note that both solutions appear superior to Zanchi in terms of bandwidth, since no active device (such as PMOSFETs M11, M12 in FIG. 3 to Zanchi) is connected in parallel to the resistive load in these other implementations. The preamplifier of Zanchi and Tsay does not require a specific common-mode control, while Michalski introduces a common-mode feedback loop driving the PMOSFET in FIG. 3 thereof. None of these prior art solutions discuss the issue of noise in the OPAMP. However, these inventors point out that, noise-wise, Michalski and Zanchi/Tsay are also superior to Zanchi, since any noise coming from the active device connected to the center tap of the resistors is common-mode noise: therefore, it does not play a role in the differential noise referred to the input of the amplifier, given the OPAMP's differential nature. In Zanchi, much like in Singer et al. (IEEE ISSCC, 2000) and Kelly et al. (IEEE ISSCC, 2001) the noise of active devices is instead propagated to the differential output, leading to inferior Signal/Noise Ratio (SNR) performance.
From this observation stems, nevertheless, only one side of the noise-speed tradeoff: preamplifier gains of four (Zanchi/Tsay) or eight (Michalski) do not optimize the balance between noise added by the preamplifier and abatement of the noise generated from the OPAMP second stage, as will be shown by simulation. What is desired, therefore, in order to reach an optimal level of preamplifier gain vs. noise and control the common-mode bias of the circuit, is a combination of a purely resistive differential load with a common-mode feedback driving a common-mode connected active device (for lower preamplifier noise and common-mode control); and of a mixed active/passive-resistive differential load, with the same common-mode feedback driving a differentially connected active device (for higher gain, improved noise abatement of the next stage, and common-mode control). The additional degree of design freedom yielded by the variable extent of the combination of these two topologies can now be exploited to determine the optimal mix of the two loads, which minimizes noise while maximizing the OPAMP gain-bandwidth product: i.e., the sampling rate of the system as a whole.